# Channel Coding Software Decoders Hall of Fame

This page presents a Channel Coding Software Decoders "Hall of Fame". It allows to see at a glance what has been achieved, what can be expected from today software decoders, and easily compare their respective characteristics. For now, three wide code families are considered: the Turbo codes (LTE, LTE-Advanced, CCSDS, etc.), the Low-Density Parity-Check (LDPC) codes (Wi-Fi, WiMAX, CCSDS, WRAN, DVB-S2, etc.), and the recently introduced Polar codes (candidates for 5G).

All the presented results, collected from the state-of-the-art research papers published in the field, consider a BPSK (Bit Phase-Shift Keying) modulation/demodulation and an AWGN (Additive White Gaussian Noise) channel.

This Hall of Fame strives to present results as fairly as possible: for example, early termination criteria are not taken into consideration while computing throughput, in order to compare raw performances using a consistent method. It remains possible, however, for typos/glitches/mistakes to have inadvertantly made it to the scoreboard. In that eventuality, do not hesitate to contact us. If you would like to have your decoder listed as well in the Hall of Fame: please send us the corresponding research paper references, and we will be delighted to add them.

In blue, the results simulated or reproducible with AFF3CT: our Open-source communication chain dedicated to the Forward Error Correction (FEC) simulations.

Last update: 2017-10-24.

Maximum A Posteriori (MAP) - 8-state trellis
Work Year Platform Implem. Pre. Inter $K$ $R$ $i$ $\mathrm{Lat.}$ $\mathrm{Thr.}$ $\mathrm{NThr.}$ $\mathrm{TNDC}$ ${E}_{d}$
[1] 2010 Tesla C1060 ML-MAP 32 100 6144 1/3 5 76800 8.0 6.7 0.021 29851
[2] 2011 GTX 470 ML-MAP 32 100 6144 1/3 5 20827 29.5 24.6 0.045 8740
[3] 2011 i7-960 ML-MAP 16 1 1008 1/3 8 138 7.3 9.7 0.380 13402
[4] 2012 Tesla C2050 L-MAP 32 32 11918 1/3 5 108965 3.5 2.9 0.0057 85172
[5] 2012 9800 GX2 ML-MAP 32 1 6144 1/3 5 3072 2.0 1.7 0.0043 115882
[6] 2012 X5670 EML-MAP 8 6 5824 1/3 3 157 222.6 111.3 0.396 854
[7] 2013 GTX 550 Ti EML-MAP 32 1 6144 1/3 6 72 85.3 85.3 0.247 1360
[8] 2013 GTX 580 ML-MAP 32 1 6144 1/3 6 1660 3.7 3.7 0.0047 63946
[9] 2013 GTX 480 EML-MAP 32 1 6144 1/3 6 50 122.8 122.8 0.183 2036
[10] 2013 GTX 680 EML-MAP 32 16 6144 1/3 6 2657 37.0 37.0 0.024 5270
[10] 2013 i7-3770K EML-MAP 16 4 6144 1/3 6 323 76.2 76.2 0.680 1011
[11] 2014 Tesla K20c ML-MAP 32 1 6144 1/3 5 1097 5.6 4.7 0.0026 47872
[12] 2014 GTX 580 BR-SOVA 8 4 6144 1/3 5 192 127.8 106.5 0.135 2291
[13] 2016 2xE5-2680v3 EML-MAP 16 192 6144 1/3 6 2657 443.7 443.7 0.924 541
[13] 2016 2xE5-2680v3 EML-MAP 8 384 6144 1/3 6 3293 716.4 716.4 0.746 335

## References

1. M. Wu, Y. Sun, and J. R. Cavallaro, “Implementation of a 3GPP LTE turbo decoder accelerator on GPU,” in IEEE SiPS, 2010.
2. M. Wu, Y. Sun, G. Wang, and J. R. Cavallaro, “Implementation of a high throughput 3GPP turbo decoder on GPU,” Springer JSPS, vol. 65, no. 2, pp. 171-183, 2011.
3. L. Huang et al., “A high speed turbo decoder implementation for CPUbased SDR system,” in IEEE IET ICCTA, 2011.
4. S. Chinnici and P. Spallaccini, “Fast simulation of turbo codes on GPUs,” in IEEE ISTC, 2012, pp. 61-65.
5. D. Yoge and N. Chandrachoodan, “GPU implementation of a programmable turbo decoder for software defined radio applications,” in IEEE VLSID, 2012.
6. S. Zhang, R. Qian, T. Peng, R. Duan, and K. Chen, “High throughput turbo decoder design for GPP platform,” in IEEE ICST, 2012.
7. C. Liu, Z. Bie, C. Chen, and X. Jiao, “A parallel LTE turbo decoder on GPU,” in IEEE ICCT, 2013.
8. X. Chen, J. Zhu, Z. Wen, Y. Wang, and H. Yang, “BER guaranteed optimization and implementation of parallel turbo decoding on GPU,” in IEEE ICST, 2013.
9. J. Xianjun, C. Canfeng, P. Jaaskelainen, V. Guzma, and H. Berg, “A 122mb/s turbo decoder using a mid-range GPU,” in IEEE IWCMC, 2013.
10. M. Wu, G. Wang, B. Yin, C. Studer, and J. R. Cavallaro, “HSPA+/LTE-A turbo decoder on GPU and multicore CPU,” in IEEE ACSSC, 2013.
11. Y. Zhang et al., “The acceleration of turbo decoder on the newest GPGPU of kepler architecture,” in IEEE ISCIT, 2014.
12. R. Li, Y. Dou, J. Xu, X. Niu, and S. Ni, “An efficient parallel SOVAbased turbo decoder for software defined radio on GPU,” IEICE Trans. Fundamentals, vol. 97, no. 5, pp. 1027-1036, 2014.
13. A. Cassagne, T. Tonnellier, C. Leroux, B. Le Gal, O. Aumage, and D. Barthou, “Beyond Gbps Turbo decoder on multi-core CPUs,” in IEEE ISTC, 2016.